Multilevel inverter modulation method with DC-link disturbance compensation

S. Kouro, J. Rodríguez, J. Pontt, M. Angulo

Resultado de la investigación: Contribución a los tipos de informe/libroContribución a la conferenciarevisión exhaustiva

3 Citas (Scopus)


Multilevel inverters have emerged as the state of the art power conversion systems for high power medium voltage applications. However, like most power converter families, these inverters are nonlinear systems with dead times, voltage drops across the power semiconductors, load and supply dependent DC-links, that all together can generate considerable low frequency voltage and current distortion affecting negatively the quality of important variables of the global process powered by the inverter. In high power applications this can be very critical due to the amount of energy involved in non desirable harmonics. This paper presents a solution to these problems by including the disturbances in the modulation strategy. Results are presented for a nine level cascaded asymmetric inverter, showing how the algorithm rejects DC-link voltage ripple and compensates voltage drops and dead times of the converter. The proposed method is also compared to Multiple Carrier Phase Disposition PWM to highlight the differences obtained when using the compensation.

Idioma originalInglés
Título de la publicación alojadaIECON 2005
Número de páginas6
EstadoPublicada - 2005
EventoIECON 2005: 31st Annual Conference of IEEE Industrial Electronics Society - Raleigh, NC, Estados Unidos
Duración: 6 nov. 200510 nov. 2005


OtrosIECON 2005: 31st Annual Conference of IEEE Industrial Electronics Society
País/TerritorioEstados Unidos
CiudadRaleigh, NC

Áreas temáticas de ASJC Scopus

  • Ingeniería eléctrica y electrónica


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