Quick diagnosis of short circuit faults in cascaded H-bridge multilevel inverters using FPGA

Saeed Ouni, Mohammad Reza Zolghadri, Jose Rodriguez, Mahmoud Shahbazi, Hashem Oraee, Pablo Lezana, Andres Ulloa Schmeisser

Research output: Contribution to journalArticlepeer-review

6 Citations (Scopus)

Abstract

Fast and accurate fault detection is the primary step and one of the most important tasks in fault tolerant converters. In this paper, a fast and simple method is proposed to detect and diagnosis the faulty cell in a cascaded H-bridge multilevel inverter under a short circuit fault. In this method, the reference voltage is calculated using switching control pulses and DC-Link voltages. The comparison result of the output voltage and the reference voltage is used in conjunction with active cell pulses to detect the faulty cell. To achieve this goal, the cell which is active when the Fault signal turns to “0” is detected as the faulty cell. Furthermore, consideration of generating the active cell pulses is completely described. Since the main advantage of this method is its simplicity, it can be easily implemented in a programmable digital device. Experimental results obtained with an 11-level inverter prototype confirm the effectiveness of the proposed fault detection technique. In addition, they show that the diagnosis method is unaffected by variations of the modulation index.

Original languageEnglish
Article numberJPE 17-1-6
Pages (from-to)56-66
Number of pages11
JournalJournal of Power Electronics
Volume17
Issue number1
DOIs
Publication statusPublished - 2017

Keywords

  • Cascaded H-bridge multilevel inverter
  • Fault diagnosis
  • Field-programmable gate array (FPGA)

ASJC Scopus subject areas

  • Control and Systems Engineering
  • Electrical and Electronic Engineering

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