Abstract
For medium-voltage (MV) industrial applications such as the HVDC and adjustable-speed ac-motor drives, the multilevel voltage-source converters are deemed the predominant topologies. One of the promising derived-topologies from the neutral-point-clamped (NPC) configuration is the active NPC (ANPC) structure with an improved balanced lossdistribution performance. This paper introduces duo-ANPC (D-ANPC) converter topology, which is controlled with a new modulation technique. The suggested control method regulates the flying capacitor (FC) voltages naturally at their reference values and preserves the indispensable attribute of the natural balance in the FC-based ANPC inverters. The D-ANPC converter's phase leg is formed by equipping the classic ANPC converter with additional two low-frequency (LF) MV power switches, adding up to six in contrast to four LF power switches in the ANPC. The proposed D-ANPC converter has considerable advantages over the classic multilevel inverters that makes it a competitive topology for MV applications. The substantial reduction in the number of the high-frequency (HF) MV insulated-gate bipolar transistors (IGBTs) by 50% in comparison with the classic ANPC converter as well as a drastic abatement in the total voltage rating and the stored energy of the FCs are the main significant advantages offered by the D-ANPC multilevel converter over the flying-capacitor-based inverters. This study explores the fundamental circuitry of the proposed D-ANPC multilevel topology and provides an exhaustive comparison with classic FC-based inverters. The experimental results are presented to validate the proposed D-ANPC topology and its modulation.
Original language | English |
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Title of host publication | APEC 2018 - 33rd Annual IEEE Applied Power Electronics Conference and Exposition |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 2642-2649 |
Number of pages | 8 |
Volume | 2018-March |
ISBN (Electronic) | 9781538611807 |
DOIs | |
Publication status | Published - 18 Apr 2018 |
Event | 33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018 - San Antonio, United States Duration: 4 Mar 2018 → 8 Mar 2018 |
Conference
Conference | 33rd Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2018 |
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Country/Territory | United States |
City | San Antonio |
Period | 4/03/18 → 8/03/18 |
Keywords
- ANPC inverter
- Duo-ANPC converter
- Flying-capacitor voltage decrement
- IGBT abatement
- Natural balance
- PSCPWM
- Stored energy reduction
ASJC Scopus subject areas
- Electrical and Electronic Engineering